The present invention relates to a semiconductor device and a method for producing the same.
In recent years, along with the rapid miniaturization of semiconductor integrated circuit devices, the operating speed thereof has been increased and the power consumption thereof has been reduced. This results in an urgent need for improving transistors, and the gate oxide film has therefore been made thinner and thinner. As the thickness of the gate oxide film is reduced, reliability problems, such as NBTI (Negative Bias Temperature Instability) degradation, are being highlighted.
A conventional method for producing a semiconductor device will now be described.
FIGS. 32A to 32D are cross-sectional views sequentially showing the steps of the conventional method for producing a semiconductor device.
First, in the step shown in FIG. 32A, a gate electrode 4 is formed on a pMOS formation region 1a including an n-type well and on an nMOS formation region 1b including a p-type well, via a gate oxide film 3. The regions 1a and 1b are obtained by implanting an impurity into a semiconductor substrate 1. Then, a photoresist 5 is formed so as to cover the pMOS formation region 1a, and ions of an n-type impurity are implanted into the NMOS formation region 1b to form an extension diffusion layer 6. Then, in the presence of the photoresist 5, ions of a p-type impurity are implanted into the NMOS formation region 1b to form a pocket layer 7. Then, a heat treatment by an RTA method is performed, as necessary, for the purpose of removing interstitial silicon atoms.
Then, in the step shown in FIG. 32B, a photoresist 8 is formed, after removing the photoresist 5, so as to cover the NMOS formation region 1b, followed by a fluorine ion implantation 9 into the pMOS formation region 1a. Thus, a fluorine ion implantation region 9a is formed where fluorine ions are implanted into the surface of the pMOS formation region 1a. 
Then, in the step shown in FIG. 32C, first and second heat treatments are performed. The first heat treatment is performed for the purpose of eliminating interstitial silicon atoms, which have occurred in the surface of the semiconductor substrate upon implantation of fluorine ions. The first heat treatment is performed for the purpose of sufficiently activating impurities while reducing the damage to the semiconductor substrate, and is performed at a high temperature for a short period of time by using a method such as RTA. The second heat treatment is performed for the purpose of achieving the diffusion of the fluorine ion implantation region 9a, and is performed at a lower temperature than the first heat treatment for a long period of time by using a furnace annealing process.
Then, in the step shown in FIG. 32D, a photoresist 10 is formed so as to cover the nMOS formation region 1b, and ions of a p-type impurity are implanted into the pMOS formation region 1a to form an extension diffusion layer 11. Then, in the presence of the photoresist 10, ions of an n-type impurity are implanted into the pMOS formation region 1a to form a pocket layer 12 (see, for example, JP 3523151).